Alecsandra-Viorica Buta (Rusu)

Active participation in research activities associated with the project, contributing to the preparation of reports and scientific papers generated during the project. Furthermore, I work in a team and collaborate with my colleagues to ensure the highest quality outcomes.

• Date of Birth: 04/21/95
• Gender: Female
• Nationality: Romanian

• JNOG (Journées Nationales d'Optique Guidée) în Limoges, France
• SSET 2017 (The Student Symposium on Electronics and Telecommunications), Cluj-Napoca (Bronze)
• Infineon Innovation Days Bucharest 2024 (Bronze)

• 2021, Electrical Parameters Prediction for Fab-to-Fab IC Product Migration, In the case of production migration of a specific semiconductor device from one fabrication plant to another, yield estimation in the target fab can be accelerated by employing information from the source fab, assuming that the process parameter distributions in the two fabrication plants are similar, but not the same. In this paper, we employ a five-block yield estimation methodology with different methods of feature selection and prediction., A. Rusu, I. Kovacs, B. Cărbunescu, M. Țopa, A. Buzo and G. Pelz, 2021 IEEE 27th International Symposium for Design and Technology in Electronic Packaging (SIITME), pp 117-120
• 2022, On Combining Several Optimization Algorithms for Improving the Efficiency of IC Verification Process, In the modeling of complex integrated circuits, the locations of the sampled data points are essential to the success of the verification process. This paper proposes three combinations of existing methods with the purpose of minimizing this trade-off and efficiently characterizing the verification space., A. Rusu, I. Kovacs, B. Cărbunescu, M. Țopa, A. Buzo and G. Pelz, ACTA TECHNICA NAPOCENSIS Electronics and Telecommunications
• 2023, Improvement and Performance Evaluation of an Adaptive Method for Integrated Circuits Pre-silicon Verification, This paper presents an adaptive pre-silicon integrated circuit verification method based on a machine learning algorithm. The method was intensively tested in what regards its accuracy on a large set of synthetic test functions that mimic the behavior of real circuits., A. Rusu, E. David, M. Țopa, V. Grosu, A. Buzo and G. Pelz, International Symposium on Signals, Circuits and Systems (ISSCS)
• 2024, On Approaching Multivariate IC Pre-silicon Verification Using ML-based Adaptive Algorithms, This paper introduces several solutions for multivariate extension of a previously designed single response adaptive pre-silicon integrated circuit verification approach employing machine learning algorithms., A. Rusu, E. David, M. Ţopa, V. Grosu, A. Buzo and G. Pelz, 2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS)
• 2024, On Multivariate Electrical Performance Machine Learning Driven Pre-Silicon IC Adaptive Verification, This paper presents an adaptive pre-silicon integrated circuit verification algorithm that incorporates a machine learning algorithm. The proposed solution employs an adaptive algorithm whose parameters have been analyzed in detail and optimized to achieve high performance., A. Rusu, E. David, V. Grosu, M. Topa, A. Buzo, B. Carbunescu, G. Pelz, IEEE Access

I like to know and experience as many things as possible.