- designing simple schematics for logic gates
- creating the layout for standard cells
- generating the netlists required (GDS, CDL, SPICE, LEF)
- conducting back-end checks to ensure all cell views had been created correctly and in accordance to protocol
- creating detailed reports to present project's final status
- working on different process nodes
Project 1 (Electronic devices and circuits): Design of an RC Oscillator with Wien bridge, making the block diagram, construction of circuit blocks, circuit simulation in Orcad Capture CIS Lite, making the Layout in Orcad PCB Editor Lite, exporting Gerber files
Project 2: Automatic cat feeder - The project included writing the script for the feeder and building it.
University of Electronics, Telecommunications and Information Technology:
- General Culture Contest
- Simulation of the Entrance Exam, 2018 - 2019
- Lip-reading Project: I volunteered for a project that wanted to create a lip-reading algorithm. I helped the team that was designing this algorithm by being one of the volunteers that had to recite a text in front of a recording camera, 2018